Fpga
Runtime Verification with TeSSLa on a CPU/FPGA hybrid system
This is the description of a fully working runtime verification system for ARM CoreSight traces running on a CPU/FPGA hybrid system.
FPGA goes Arcade
A Tron like light cycle race implemented on a Xilinx Spartan 3 FPGA board (MIPS assembly, I/O devices, VGA output).
Additional game versions in Excel and Javascript.